Department of Electrical Engineering, South Tehran Branch, Islamic Azad University, Tehran, Iran
Department of Electrical Engineering, Faculty of Engineering, Islamshahr branch, Islamic Azad University, Islamshahr, Iran
According to the neuroscience, studies on third generation of neural networks called spik- ing neural networks (SNN) have been developed recently. SNNs are used to model natural comput- ing of the brain. Spike train based networks are investigated as signal processing of the brain is an objective. This paper propose a digital hardware implementation of a single spiking neuron. The neuron is used as a direct digital frequency synthesizer. The proposed architecture uses leaky integrate and fire (LIF) neuronal model which is easy to implement. Inter spike interval (ISI) of the input and the output spikes are used as coding scheme. A FPGA platform is utilized due to its flexibility and real time applications. The simulation results of both Matlab and Quartus II indicate acceptable accuracy of the proposed design compared to the related works. The Verilog language is used for hardware simulation. The maximum operating frequency of 250 MHz is reached on Cyclone III device.